Trench-shaped read-only memory and its method of fabrication

Details Trench-shaped read-only memory and its method of fabrication Trench-shaped read-only memory and its method of fabrication

1997-07-23

2000-01-18

Kunemund, Robert

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

438700, H01L 218246

Patent

active

060157569

ABSTRACT:
The present invention utilizes a first dielectric layer and a second dielectric layer overlying cell regions for storing a turned-off state or a turned-on state, respectively. The first dielectric layer is formed by local oxidation of polysilicon having a thickness greater than that of the second dielectric layer, such that the corresponding cell regions below the first dielectric layer have a threshold voltage greater than that of the second dielectric layer. Moreover, the formation of the first dielectric layer can lower the parasitic capacitance between the word lines and the bit lines as well as the substrate. Furthermore, the present invention does not require code-implantation. Thus, decreased breakdown voltage encountered in the conventional method can be avoided.

REFERENCES:
patent: 3873373 (1975-03-01), Hill
patent: 4178396 (1979-12-01), Okano et al.
patent: 4343676 (1982-08-01), Tarng
patent: 4690729 (1987-09-01), Douglas
patent: 4702795 (1987-10-01), Douglas

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