Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2006-05-31
2009-06-09
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S198000, C438S222000, C257SE21642
Reexamination Certificate
active
07544548
ABSTRACT:
A semiconductor process and apparatus provide a shallow trench isolation region (96) with a trench liner (95, 104) for use in a hybrid substrate device (21) by lining a first trench with a first trench liner (95), and then lining a second trench formed within the first trench by depositing a second trench liner (104) that is anisotropically etched to expose an underlying substrate (70) on which is epitaxially grown a silicon layer (110) to fill the second trench. By forming first gate electrodes (251) over a first SOI substrate (90) using deposited (100) silicon and forming second gate electrodes (261) over an epitaxially grown (110) silicon substrate (110), a high performance CMOS device is obtained which includes high-k metal PMOS gate electrodes (261) having improved hole mobility.
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patent: 2005/0090072 (2005-04-01), Doris et al.
patent: 2005/0142799 (2005-06-01), Seo
M. Yang et al., “High Performance CMOS Fabricated on Hybrid Substrate with Different Crystal Orientations,” IEEE, IEDM 2003, pp. 453-456.
B. Doris et al., A Simplified Hybrid Orientation Technology (SHOT) for High Performance CMOS, VLSI Technology, Digest of Technical Papers, 2004 Symposium, pp. 86-87.
Nguyen Bich-Yen
Sadaka Mariam G.
White Ted R.
Cannatti Michael Rocco
Chaudhari Chandra
Freescale Semiconductor Inc.
Hamilton & Terrile LLP
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