Trench isolation structure in a semiconductor device and...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S506000, C257S510000, C438S207000

Reexamination Certificate

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07968948

ABSTRACT:
A trench isolation structure in a semiconductor device is provided. A semiconductor substrate has cell regions and peripheral circuit regions. First trenches have a predetermined depth and are formed in the semiconductor substrate at the cell regions. A first sidewall oxide film is formed overlying the first trenches. A first liner nitride film is formed overlying the first sidewall oxide film. Second trenches have a predetermined depth and are formed in the semiconductor substrate at the peripheral circuit regions. A second sidewall oxide film is formed overlying the second trenches. An oxide film fills the first overlying second trenches. A second liner nitride film formed on the filling oxide film. The second liner nitride film is separated from the sidewalls of the first and second trenches.

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patent: 2002/0076879 (2002-06-01), Lee et al.
patent: 2003/0013272 (2003-01-01), Hong et al.
patent: 2003/0199136 (2003-10-01), Kim et al.
patent: 10-2004-0060219 (2004-07-01), None
patent: 10-2004-0103718 (2004-12-01), None
patent: 10-2005-0002037 (2005-01-01), None
patent: 10-2005-0003172 (2005-01-01), None

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