Trench isolation structure having a trench formed in a LOCOS str

Details Trench isolation structure having a trench formed in a LOCOS str Trench isolation structure having a trench formed in a LOCOS str

1992-09-23

1994-09-27

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

257509, 257648, 257510, H01L 2702

Patent

active

053509412

ABSTRACT:
An isolation structure is disclosed which isolates an active region (24) from other proximate active regions. The isolation structure utilizes the combination of a LOCOS structure (26) comprising bird's beak structure (26a) and (26b). A trench (34) is formed through the LOCOS structure (26). A channel stop implant region (40) is formed along the sidewalls of the trench (34). A trench plug (46) is used to fill the trench. The isolation structure thereby uses the isolation capabilities of trench isolation structures, but prevents the leakage currents common along trench sidewalls by isolating the trench sidewalls from the active region using the LOCOS structures.

REFERENCES:
patent: 4679304 (1987-07-01), Bois
patent: 4958213 (1990-09-01), Eklund et al.
patent: 5038193 (1991-08-01), Kamigaki et al.
patent: 5073813 (1991-12-01), Morita et al.
patent: 5223736 (1993-06-01), Rodder
Davari, B., et al., "A Variable-Size Shallow Trench Isolation (STI) Technology", Intl. Electron Devices Mtg. 1988, San Francisco, CA.
Lutze, Jeffrey et al., "Poly-Buffer Locos and Shallow Trench Isolation Technologies," Techcon 1990, San Jose, CA, Oct. 16-18, 1990.
Rung, R. D., "Trench Isolation Prospects for Application in CMOS VLSI", Intl. Electron Devices Mtg., San Francisco, CA, Dec. 9-12, 1984.

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