Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-01-14
2002-05-21
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S331000, C257S341000, C257S378000
Reexamination Certificate
active
06392273
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of semiconductor switching devices, and particularly to switching devices used in high-power switching circuits.
2. Description of the Related Art
Semiconductor devices are increasingly required to accommodate high currents and/or high voltages without failing. Many applications, such as pulse-width modulated motor-control circuits, require high-power switching devices. A number of devices have been developed to provide the high current and reverse blocking characteristics needed in a high power switch. The available devices offer various levels of performance for the primary parameters of interest, such as forward voltage drop V
FD
and safe-operating-area (SOA). SOA is defined as the current-voltage boundary within which a power switching device can be operated without destructive failure, and is typically specified for both short-circuit and reverse-biased operating conditions.
One such device is the insulated-gate bipolar transistor (IGBT). An IGBT with a trench gate structure has been shown to provide performance superior to that of a standard IGBT having a planar structure; one such trench-IGBT structure is shown in
FIG. 1. A
P layer
10
and an N− drift layer
12
are stacked on a collector terminal C. Each IGBT structure is built on these common layers by adding a P base region
14
on N− drift layer
12
, and an N+ region
16
within the P base region. A thin P+ layer
18
provides an ohmic contact to the P base region. An emitter terminal E contacts both the ohmic contact
18
and N+ region
16
. Similar structures are spaced periodically across the device, with each structure's emitter terminal connected together to provide a common emitter connection. Each structure is separated by a trench gate
20
which is recessed into the N− drift layer. Each gate is made from a layer of oxide
22
which contacts the N+ and P base regions of adjacent IGBT structures and the N− drift layer between them, a conductive material
24
which fills the trench, and an electrode (not shown) which contacts the conductive material; each gate electrode is connected together to provide a gate connection G. This device is described in detail in H.-R. Chang and B. Baliga, “500-V n-Channel Insulated-Gate Bipolar Transistor with a Trench Gate Structure”, IEEE Transactions on Electron Devices, Vol. 36, No. 9, September 1989, pp. 1824-1828.
In operation, a positive voltage is applied to gate terminal G. This forms inversion channels across the P base regions and accumulation channels along the trench sidewalls and bottom in the N− drift layer, allowing electrons to flow from the N+ regions to the N− drift layer through the channels. These electrons provide the base drive needed to turn on the PNP transistor formed between collector C and emitter E. The P layer responds by injecting holes into the N-drift layer, allowing current to flow from the collector C to the emitter E. The IGBT is turned off by simply making the gate voltage zero or negative, which removes the inversion channels and thus the transistors' base drive.
The use of a trench gate structure enables an IGBT per
FIG. 1
to have a very high channel density; i.e., many such structures can be fabricated side by side in a given die area. This results in the device having a very high saturation current level. Unfortunately, when such a device is short-circuited, the high saturation current level can result in the device's destruction. As such, the device's short-circuit SOA tends to be poor. One possible solution to this problem is the use of external short-circuit protection circuitry; however, such circuitry adds undesirable cost and complexity to the device.
Another possible solution for a poor short-circuit SOA is to widen the mesa regions of the device, i.e., those regions located between the trench gates, to reduce channel density and thereby lower the saturation current level. Unfortunately, a wider mesa degrades the field distribution induced across the mesa by the sidewall oxide. This adversely affects the device's reverse blocking capability and lowers its reverse-biased SOA.
SUMMARY OF THE INVENTION
A trench-IGBT with improved SOA is presented that overcomes the problems noted above. The new IGBT is particularly well-suited to high-power switching applications, providing simple gate voltage control of switching, low V
FD
, and robust short-circuit SOA and reverse-biased SOA.
The novel structure contains a number of trench-IGBT structures, but reduces the channel density of a conventional trench-IGBT device by interdigitating a number of bipolar transistor (BJT) structures with the IGBT structures. Because no inversion channels form across the BJT mesas when a positive gate voltage is applied, base drive and thus the device's saturation current level is reduced (when compared with an all-IGBT implementation), and its short-circuit SOA thereby improved. Furthermore, because the novel structure does not require a wider mesa, reverse-biased SOA is unaffected. The ratio of BJT structures to IGBT structures is adjusted as needed to obtain a desired saturation current level and short-circuit SOA.
The novel device includes shallow P regions around the bottom corners of respective trench gates to protect the trench oxide from high peak electric fields encountered when the device is reverse-biased. To counter the increased on-resistance that can be caused by the encroachment of these shallow P regions into the mesa regions, an N-type layer is added which spans the mesa regions and extends above and below the shallow P regions. The N-type layer has a lower resistance than the N− drift layer, and thus lowers the resistance through the area of encroachment. The shallow P regions can also be expanded to span the mesa regions of the BJT structures, to lower their forward voltage drop.
The introduction of BJT structures as described herein tends to slightly increase the device's on-resistance and V
FD
in comparison with a device configured in accordance with FIG.
1
. Besides employing an N-type layer as described above, the increased on-resistance can also be countered by increasing the depth of the trench gates, which increases the length of the accumulation channels formed along the trench sidewalls by the application of a positive gate voltage. This enhances the device's electron injection efficiency, increases the conductivity modulation in the N− drift region, and lowers the device's forward voltage drop.
Further features and advantages of the invention will be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.
REFERENCES:
patent: 5304821 (1994-04-01), Hagino
patent: 5471075 (1995-11-01), Shekar et al.
patent: 5751024 (1998-05-01), Takahashi
patent: 5894149 (1999-04-01), Uenishi et al.
patent: 6110799 (2000-08-01), Huang
patent: 6225649 (2001-05-01), Minato
Chang, H.-R. and Baliga, Jayant, “500-V n-Channel Insulated-Gate Bipolar Transistor With a Trench Gate Structure”, (Sep. 1989)IEEE Transactions on Electron Devices, vol. 36 No. 9, pp. 1824-1828.
Koppel, Jacobs Patrick & Heybl
Owens Douglas W.
Rockwell Science Center LLC
Thomas Tom
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