Trench free process for SRAM with buried contact structure

Details Trench free process for SRAM with buried contact structure Trench free process for SRAM with buried contact structure

1998-05-11

2000-09-12

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438533, 438526, 438652, 438230, 438305, H01L 213205, H01L 214763

Patent

active

061177547

ABSTRACT:
The present invention provides a method of forming buried contacts on a semiconductor substrate. The steps are as follows. At first, a gate insulator layer is formed over the substrate. A first silicon layer is then formed over the gate insulator layer. A buried contact opening is defined through the first silicon layer and the gate insulator layer extending down to the substrate. The substrate is then doped with a region under the buried contact opening for forming a buried contact region. A second silicon layer is formed over the substrate and the first silicon layer. A portion of the second silicon layer is then removed to define a gate region and an interconnect. Next, the substrate is doped for forming a second doping region under a region uncovered by the gate region and the interconnect. A thermal oxidation process is performed to oxidize an exposed portion of the first silicon layer and a portion of the second silicon layer at a top surface. Sidewall structures are then formed on sidewalls of the interconnect and the gate region. The substrate is doped for forming a third doping region in the second doping region under a region uncovered by the sidewall structures.

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