Trench DRAM cell with vertical transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257304, 257400, H01L 2968, H01L 2978, H01L 2992

Patent

active

052528456

ABSTRACT:
The DRAM cell of the invention comprises a structure wherein a deep trench is formed on a silicon wafer, a stacked trench capacitor is formed around a silicon pillar associated with the trench, and a vertical transfer transistor is formed on top of the silicon pillar after the formation of the stacked trench capacitor. The transfer transistor is connected to the storage capacitor through a selectively doped n.sup.+ diffused layer, and isolation between DRAM cells is formed by the trench.

REFERENCES:
patent: 4786954 (1988-11-01), Morie et al.
patent: 4916524 (1990-04-01), Teng et al.
patent: 4926224 (1990-05-01), Redwine
patent: 5072269 (1991-12-01), Hieda

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