Trench capacitor precharge structure and leakage shield

Details Trench capacitor precharge structure and leakage shield Trench capacitor precharge structure and leakage shield

1996-03-18

1997-11-04

Munson, Gene M.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257301, H01L 27108, H01L 2994

Patent

active

056843143

ABSTRACT:
An integrated structure is provided that includes a DRAM cell with a trench storage capacitor, and a corresponding storage node precharge circuit. The entire structure ideally requires only eight square features of area per memory bit. The structure also provides a partial leakage current shield for the DRAM storage node diffusion, thereby improving the data hold time. A graded impurity region around the storage node diffusion enhances the leakage shielding effect. The structure can be operated independently as a DRAM leakage shield if the precharge circuit is not needed. In that case, a junction diffusion in the structure can be eliminated and a leakage shielding effect is still achieved.

REFERENCES:
patent: 4163245 (1979-07-01), Kinoshita
patent: 4635085 (1987-01-01), Taguchi
patent: 4658283 (1987-04-01), Koyama
patent: 4801988 (1989-01-01), Kenney
patent: 4833647 (1989-05-01), Maeda et al.
patent: 5410169 (1995-04-01), Yamamoto et al.
patent: 5414656 (1995-05-01), Kenney
patent: 5512767 (1996-04-01), Noble
Kenney et al., "16-Mbit Merged Isolation and Node Trench SPT Cell, " IEEE Symposium on VLSI Technology, May, 1988, pp. 25-26.
Bakeman et al., "A High Performance 16-Mb DRAM Technology," IEEE Symposium on VLSI Technology, Jun., 1990.
U.S. application No. 08/603,832, Kenney, filed Feb. 20, 1996.

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