Trellis-based receiver

Details Trellis-based receiver Trellis-based receiver

2007-03-27

2007-03-27

Lamarre, Guy J. (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S794000, C714S796000, C714S795000, C714S748000, C375S262000, C375S341000, C375S265000

Reexamination Certificate

active

10532930

ABSTRACT:
Receivers (1) for receiving encoded block signals and comprising processor systems (2) decode block signals by using Viterbi algorithms for finding a first candidate/path in a trellis (18) and by generating cost signals for finding further candidates/paths in said trellis (18). To reduce storage capacity, cost signals are combined for series of branches and cumulated cost is compared with thresholds. While searching for said further paths, a search for a further path is made in view of cumulated cost exceeding a threshold or not. The insight of indirectly constructing a list of candidates and the basic idea of more directly constructing said list brings more control. These receivers are less complex, and are further improved by introducing increasing thresholds per trellis and successive combining and different trellis directions for generating and cumulating cost signals and combining in a lexicographical order, and using a check sum for list reduction and by making error detections.

REFERENCES:
patent: 5537444 (1996-07-01), Nill et al.
patent: 6126310 (2000-10-01), Osthoff et al.
patent: 6418549 (2002-07-01), Ramchandran et al.
patent: 6507927 (2003-01-01), Kalliojarvi
patent: 6892343 (2005-05-01), Sayood et al.
IEEE Trans on Comm. vol. 43, No. 2/3/4, Feb./Mar./Apr. 1995, List and Soft Symbol Output Viterbi Algorithms: Extensions and Comparisons, Nill et al. pp. 277-287.

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