Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-03-01
2008-12-30
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S644000, C438S650000, C257SE21174, C257SE21586
Reexamination Certificate
active
07470617
ABSTRACT:
In one embodiment, the present invention includes a method for depositing a barrier layer on a substrate having a trench, depositing a liner layer on the barrier layer that includes a surface oxide, electrolessly depositing a copper seed layer on the liner layer, where the surface oxide is reduced in-situ in an electroless bath, depositing a bulk metal layer on the copper seed layer. Other embodiments are described and claimed.
REFERENCES:
patent: 2005/0009325 (2005-01-01), Chung et al.
patent: 2006/0246699 (2006-11-01), Weidman et al.
patent: 2007/0004587 (2007-01-01), Chebiam et al.
patent: 2007/0099422 (2007-05-01), Wijekoon et al.
U.S. Appl. No. 11/639,636, filed Dec. 14, 2006, entitled “Improving Copper Nucleation In Interconnects Having Ruthenium Layers,” by Ramanan V. Chebiam and Valery M. Dubin.
U.S. Appl. No. 11/591,792, filed Nov. 1, 2006, entitled “Deposition Process For Iodine-Doped Ruthenium Barrier Layers,” by Joseph H. Han, et al.
Chebiam Ramanan
Cheng Chin-Chang
Simka Harsono
Whitney Damian
Coleman W. David
Intel Corporation
Scarlett Shaka
Trop Pruner & Hu P.C.
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