Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2006-12-29
2008-11-04
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S193000, C365S230060
Reexamination Certificate
active
07447097
ABSTRACT:
A tRAS adjusting circuit extends an active operation in a self-refresh operation. The tRAS adjusting circuit includes: a self-refresh sensing unit for receiving a self-refresh signal and a refresh signal and generating a sensing signal; a first extension unit for extending an enable interval of an active operation pulse; a second extension unit for extending an enable interval of an output signal of the first extension unit; a transfer unit for transferring either the output signal of the first extension unit or an output signal of the second extension unit as a tRAS signal according to an enable state of the sensing signal; and an active signal output unit for receiving the active operation pulse and tRAS signal and outputting an enable state of the active operation pulse as an active signal until the tRAS signal is disabled.
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Notice of Patent Grant mailed Jan. 3, 2008 for the corresponding KR10-2006-0046186.
Chu Shin Ho
Hwang Mi Hyun
Auduong Gene N.
Hynix / Semiconductor Inc.
Ladas & Parry LLP
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