Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
2005-04-12
2005-04-12
Huynh, Kim (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C718S001000, C710S002000, C710S003000, C711S002000, C711S100000, C711S165000, C711S200000, C711S202000, C711S203000, C711S205000, C711S206000, C711S207000, C711S208000, C711S209000, C711S220000, C711S221000
Reexamination Certificate
active
06880022
ABSTRACT:
A computer has a hardware memory arranged into portions that are separately addressable using first identifiers, which are represented using a first number of address bits. A subsystem that is able to address a second space of the hardware memory using second identifiers initiates I/O requests directed to a device that is able to address a different, first memory space using first identifiers, which are represented using a second number of address bits. The second identifiers are initially mapped into the second memory space, but for any I/O request that meets a remapping criterion, the corresponding second identifier is remapped to one of the first identifiers that identifies a portion of the memory in the first memory space. The second space is different from the first space and the second number of address bits is greater less than the first number of address bits.
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Govil Kinshuk
Nelson Michael
Waldspurger Carl A.
Huynh Kim
Nguyen Tanh Q
Pearce Jeffrey
VMware, Inc.
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