Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
1999-05-18
2002-11-19
Wong, Peter (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C361S111000, C327S050000, C327S058000
Reexamination Certificate
active
06484223
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a transmitting device and a bus system for the serial data transfer of binary data between at least two communication stations, which are coupled to one another via a single bus line.
Such a bus system which is suitable for the serial transfer of binary data may be a CAN bus system (CAN=controller area network), for example. A CAN bus system of this type is described, for example, in German published patent application DE 195 230 31 A1.
A bus system for the transfer of data between different communication stations, coupled to a differential dual-wire bus, by means of push-pull signals is specified in the above document. The physical coupling to the dual-wire bus is effected via a transmitting/receiving device, the so-called transceiver (combined terms “transmitter” and “receiver”), contained in each communication station. The transceiver transmits and receives data via the bus.
The transmitting device of the transceiver circuit can significantly influence the edge form of the signal to be coupled into the bus. If the bus signals on the bus are driven at a sufficiently high frequency, then as the frequency increases, an increase is likewise observed in the electromagnetic radiation. Equally, the frequency spectrum of the electromagnetic radiation is widened if the edge steepness of the bus signals coupled into the bus system increases. However, high electromagnetic radiation and, consequently, low electromagnetic compatibility (EMC) have an interfering effect on other assemblies. It is desirable, therefore, to keep the electromagnetic radiation in a bus system as low as possible.
In order to reduce the electromagnetic radiation in dual-wire or multiple-wire bus systems, such as, for example, the dual-wire CAN bus, the (two) bus cores are twisted together. The electromagnetic radiation is largely compensated for by the twisting of the bus lines (twisted pair).
For cost reasons, it is often more favorable to use a bus system having only a single bus line. Such a bus system is, by way of example, the single-wire CAN bus. On the other hand, such single-wire buses have the disadvantage that the electromagnetic radiation cannot be compensated for by twisting as in the case of two-core or multiple-core bus systems.
In order to reduce the electromagnetic radiation, bus systems of this type are connected up to passive components. However, this measure improves the electromagnetic radiation only inadequately and, moreover, reduces the bandwidth of the bus system.
So-called “slew rate limiter” circuits are known as a further measure for reducing the electromagnetic radiation. These circuits effect simple leveling off of the edges of the square-wave bus signals to form trapezoidal signals. This measure considerably reduces the spectrum of the radiated electromagnetic radiation as compared with the passive measures mentioned above.
In order to obtain a further reduction in the spectral components of the electromagnetic radiation, the corners of the trapezoidal bus signal thus produced can be additionally rounded by the targeted incorporation of resistance-capacitance time constants.
Although a considerable reduction in the electromagnetic radiation is discernible as a result of the above-mentioned measures, a considerable spectrum of undesirable electromagnetic radiation nonetheless remains.
SUMMARY OF THE INVENTION
Taking this prior art as a departure point, the object of the present invention, therefore, is to specify a single-wire bus system of the generic type in which it is possible to obtain a further reduction in the electromagnetic radiation.
With the foregoing and other objects in view there is provided, in accordance with the invention, a transmitting device for a serial data transfer of binary data between a plurality of communication stations connected via a single bus line, comprising:
a circuit for edge form setting having an input receiving a data signal to be transmitted and an output;
the circuit generating an output signal from the data signal received at the input, by approximating respective rising and falling edges of the output signal to a curve profile of a sine function having a rising half-wave and a falling half-wave, and thereby approximating one of the rising and falling edges to the rising sine half-wave and the respective other of the rising and falling edges to the falling sine half-wave.
In accordance with an added feature of the invention, the sine half-waves are derived from a function (cos x)
2
, where x designates an angle in radians.
In other words, the object of the invention are attained with the transmitting device that includes the novel circuit for edge form setting. The circuit generates an output signal from a data signal to be transmitted, the rising and falling edges of which output signal are approximated to the curve profile of a sine function and the edges are approximated to the rising sine half-wave and to the falling sine half-wave, respectively.
Such output signals having edges in the form of a sine half-wave have a particularly low harmonic content. In theory, to be precise, they have only the fundamental. In this way, it is advantageously possible to reduce radiation of or irradiation by undesirable electromagnetic radiation to a minimum in a single-wire bus system by providing a circuit for edge form setting according to the invention.
The intention, therefore, is for the edges of the output signals to be transferred via the bus to be approximated to the form of a sinusoidal function. In this case, the rising sine half-wave is respectively simulated for the rising edge and the falling sine half-wave is respectively simulated for the falling edge. In negative logic, a rising edge generates a falling sine half-wave, while a falling edge respectively generates a rising sine half-wave.
In this context, the rising sine half-wave is to be understood as the region of the sinusoidal wave between its minimum and its maximum. The falling sine half-wave, on the other hand, is to be understood as the region of the sinusoidal wave between its maximum and its minimum. The sinusoidal function is to be understood to mean any function derived from a sine function or from a cosine function. It is particularly advantageous if the function (cos x)
2
is chosen as the sinusoidal function.
In accordance with an additional feature of the invention, the circuit for edge form setting includes a clock generator, a counter device connected to the clock generator, and a converter connected to the counter device;
the clock generator generating a clock signal from the data signal to be transmitted, and outputting the clock signal to the counter device;
the counter device generating a counter reading signal in clocked fashion; and
the converter generating an analog signal derived from the counter reading signal and having stepped edges.
The clock generator is typically an oscillator and generates a clock signal. The clocked counter device connected downstream, for example an up-down counter, continuously counts the coupled-in clock pulses of the oscillator and feeds a counter reading signal derived from the number of coupled-in clock pulses to the converter connected downstream. The converter, which is usually a digital-to-analog converter (D/A converter), generates, proceeding from the counter reading signal, an analog signal having stepped clock edges. The stepped edges of the analog signal, which can be picked off at the output of the D/A converter, simulate the half-wave of a sinusoidal curve better, the greater the data depth or bit width of the up-down counter or of the D/A converter connected downstream is chosen to be.
In accordance with another feature of the invention, the converter includes a voltage divider with a plurality of reference resistors, and the step height of the individual stepped edges of the analog signal is set by a dimensioning of individual reference resistors of the voltage divider. The stepped clock edges in the analog signal simulate the sinusoidal hal
Greenberg Laurence A.
Mayback Gregory L.
Siemens Aktiengesellschaft
Stemer Werner H.
Vo Tim
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