Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2011-06-21
2011-06-21
Tran, Anh Q (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S032000, C326S086000
Reexamination Certificate
active
07965100
ABSTRACT:
In at least some embodiments, an electronic device includes a first data endpoint and differential data transceiver coupled to the first data endpoint. The differential transceiver provides a communication interface between the first data endpoint and a second data endpoint. The differential transceiver compensates for variations in a series impedance and/or a parallel impedance for a differential data line between the differential transceiver and the second data endpoint.
REFERENCES:
patent: 6504397 (2003-01-01), Hart et al.
patent: 7102381 (2006-09-01), Chen et al.
patent: 7590392 (2009-09-01), Navaratnam et al.
patent: 2003/0067325 (2003-04-01), Haycock et al.
Considine Peter
Depuits Olivier
Goyal Jagdish Chand
Brady III Wade J.
Patti John J.
Telecky Jr Frederick J.
Texas Instruments Incorporated
Tran Anh Q
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