Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1994-09-16
1998-09-01
Vo, Don N.
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
370506, 370516, H04L 700
Patent
active
058021221
ABSTRACT:
A transmission system includes a matching circuit (2) for equalizing frequency and/or phase variations between an incoming and an outgoing frame-synchronized signal. The matching circuit (2) includes a buffer memory (5) to buffer the data of the signal, a write address generator (6) generating cyclic write addresses to control the writing in the buffer memory (5), and a read address generator (7) generating cyclic read addresses to control the reading from the buffer memory (5). The read address generator is provided to generate, during a predefined structure of each frame of the outgoing signal, at least a double read address if a control signal indicates a positive justification action, and is provided to skip at least one read address if the control signal indicates a negative justification action. Furthermore, a phase detector (8) is provided to form a phase value from each read address and write address and a justification decision circuit (9) is provided to generate during each frame of the outgoing signal at least once the control signal that indicates a negative justification action if a phase value continues to be below a first threshold value, and indicates a positive justification action if the phase value exceeds a second threshold value which is higher than the first threshold value.
REFERENCES:
patent: 4811340 (1989-03-01), McEachern et al.
patent: 4996698 (1991-02-01), Nelson
patent: 5263056 (1993-11-01), Urbansk
Lucent Technologies - Inc.
Vo Don N.
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