Transmission method, transmission system, input unit, output...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output addressing

Reexamination Certificate

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Details

C710S004000, C710S033000, C710S310000, C709S200000

Reexamination Certificate

active

06832267

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a transmission method and transmission system preferably used for connecting a plurality of units through, for example, IEEE1394 system bus line for carrying out data transmission among those units, and an input unit, an output unit and transmission control unit necessary for building up the same transmission system.
2. Description of the Related Art
AV apparatuses capable of transmitting information from one to the other through a network using IEEE1394 system serial data bus have been developed. For transmitting data through this bus, isochronous transmission mode used for real-time transmission of relatively large volume animation data, audio data and the like and asynchronous transmission mode used for transmitting still image, text data, control command and the like are prepared. A band dedicated for each mode is used for transmission and transmission in both modes can coexist on a single bus.
If an example realized by transmitting data among plural devices connected through such bus is picked up, for example, it is possible to connect a video signal source such as a video camera and digital still camera to a printer unit through the bus, so that the still image outputted from the video signal source can be printed through a printer unit. Transmission of the still image data for such print is carried out in the asynchronous transmission mode. When data transmission is carried out in the asynchronous transmission mode, a unit on the side of data transmission (an output device) is called a producer and a unit on the side of data reception (an input device) is called a consumer. Further, a transmission control unit for controlling data transmission between the producer and the consumer is called a controller. The producer or consumer may sometimes act as the controller at the same time.
In case where audio unit or video unit is connected to the IEEE1394 system serial data bus so as to transmit data among the units, control command transmission system called AV/C command (AV/C Command Transaction Set) can be applied. The detail of this command may be found in Standard “AV/C Digital Interface Command Set General Specification” (Version 3.0, Apr. 15, 1998), 1394 Trade Association.
Upon transmission of data in the form of serial data such as IEEE1394 system data, data input processing and output processing at a bus connecting portion of each unit are complicated and expansion of the function is limited. That is, in case of the IEEE1394 system, for example, a plug is set up in an input portion of a unit connected to the bus and a register for controlling that plug is provided so as to carry out various settings for the plug by means of the register.
FIG. 1
is a diagram showing an example of the structure of a plug control register used when transmitting data in the IEEE1394 type asynchronous transmission mode. This register is formed of hierarchical structure and as shown at the left end, bus address data is classified to nodes which are units to be connected to the bus. Each node data contains node offset data which are data about plugs to be used in data transmission with that node. As data of each plug, an area for storing data of port address for use in the plug and an area used as a segment buffer for storing data received by the plug temporarily are prepared. As the port address data, data of a port address of a transmission mate is stored and data of iAPR, which is an asynchronous input plug and data of oAPR, which is asynchronous output plug are stored. Data of oAPR, which is an output plug, can store data from plural output plugs at the same time to carry out multi-cast processing in which data from plural transmission mates are inputted at the same time.
The area used as a segment buffer is an area prepared for only unit used as consumer (input device). Direct memory access (DMA) processing for transmitting and storing data supplied from the producer (output device) into this buffer in the unit of data called segment is carried out and the data stored in this segment buffer is transmitted to a data processing portion inside the consumer.
In this case, as shown in
FIG. 1
, a segment buffer is provided in an area following the port address. Here, there is produced a problem that area which can be prepared as the segment buffer is limited. If the area is limited, expansion of the structure of the segment buffer is also limited in future. If the structure of the segment buffer in the input plug is limited, limitation occurs in data transmission system, so that high level data transmission cannot be achieved.
An object of the present invention is to enable setting for transmission through network such as IEEE1394 system with the input plugs freely.
SUMMARY OF THE INVENTION
According to the present invention, when transmitting data obtained in an output device connected to a predetermined network to the network from a predetermined output plug of the output device and receiving the data by a predetermined input plug connected to the network, prior to start of transmission of the data, the output device confirms an address of buffer for storing data obtained in the input plug of the input device temporarily with reference to address set in a predetermined pointer within a register composing the input plug, and transmits data from the output device to the confirmed address.
According to the present invention, by confirming an address set in a pointer within a register and then, transmitting data directly to a buffer at that address, the output device is capable of transmitting data to the buffer set in arbitrary area of the input device.


REFERENCES:
patent: 5265250 (1993-11-01), Andrade et al.
patent: 5404463 (1995-04-01), McGarvey
patent: 5539897 (1996-07-01), Samanta et al.
patent: 5799158 (1998-08-01), Benayoun et al.
patent: 6115739 (2000-09-01), Ogawa et al.
patent: 6535934 (2003-03-01), Troxel et al.
patent: 0 833 485 (1998-04-01), None
patent: 0 872 986 (1998-10-01), None
patent: 0 938 218 (1999-08-01), None
IEEE Standard for a High Performance Serial Bus, Microprocessor and Microcomputer Standards Committee of the IEEE Computer Society, IEEE Std 1394-1995, XP002268109, Copyright 1995.

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