Transmission lines for CMOS integrated circuits

Details Transmission lines for CMOS integrated circuits Transmission lines for CMOS integrated circuits

2006-01-26

2009-06-30

Dinh, Son (Department: 2824)

Static information storage and retrieval

Format or disposition of elements

C333S018000, C333S246000

Reexamination Certificate

active

07554829

ABSTRACT:
Improved methods and structures are provided for impedance-controlled low-loss lines in CMOS integrated circuits. The present invention offers a reduction in signal delay. Moreover, the present invention further provides a reduction in skew and crosstalk. Embodiments of the present invention also provide the fabrication of improved transmission lines for silicon-based integrated circuits using conventional CMOS fabrication techniques. One method of the present invention provides transmission lines in an integrated circuit. Another method includes forming transmission lines in a memory device. The present invention includes a transmission line circuit, a differential line circuit, a twisted pair circuit as well as systems incorporating these different circuits all formed according to the methods provided in this application.

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