Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Pulse shaping
Reexamination Certificate
2007-03-06
2007-03-06
Chang, Daniel (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Pulse shaping
C326S087000, C327S112000, C327S170000
Reexamination Certificate
active
11098108
ABSTRACT:
A transmission line driver with slew rate control includes high and low side ramp generators for generating charge and discharge ramp signals, respectively, which are input to respective comparators and a pair of source follower transistors. A pair of additional transistors is connected to the pair of source follower transistors and a pair of staggered drivers is connected to the pair of additional transistors.
REFERENCES:
patent: 6271699 (2001-08-01), Dowlatabadi
patent: 6617897 (2003-09-01), Lee
patent: 7053713 (2006-05-01), Dening
patent: 2006/0267641 (2006-11-01), Khan et al.
Ahmad B. Dowlatabadi, A Robust, Load Insensitive Pad Driver, IEEE Journal of Solid State Circuits, Apr. 2000, pp. 600-665, vol. 35, No. 4, USA.
Hwang, Cheng Chow and Chen, Yi Huang, Novel Output Buffer Design for USB Applications, The Second IEEE Asia Pacific Conference on ASICs, 2000, pp. 69-72, USA.
Khan Qadeer A.
Misri Kulbhushan
Tripathi Divya
Bergere Charles
Chang Daniel
Freescale Semiconductor Inc.
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