Transmission error checking in result forwarding

Details Transmission error checking in result forwarding Transmission error checking in result forwarding

2006-04-04

2006-04-04

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error/fault detection technique

C714S799000, C708S531000

Reexamination Certificate

active

07024618

ABSTRACT:
Disclosed is a parity checking scheme for data forwarding of results from a first function unit to a second function unit. In one embodiment, the results of the first function unit are forwarded along a result forwarding bus to a destination parity generator at the second function unit. The destination parity generator generates destination parity bits for the forwarded results and sends the destination parity bits to a parity checking circuit at the second function unit. In addition, the results of the first function unit are sent to a source parity generator at the first function unit. The source parity generator generates source parity bits for the forwarded results and sends the source parity bits to the parity checking circuit at the second function unit via a parity forwarding bus. The parity checking circuit compares the source parity bits and the destination parity bits, and generates a parity error signal indicating whether result forwarding is with any error.

REFERENCES:
patent: 5155735 (1992-10-01), Nash et al.

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