Transmission data loss detection system

Details Transmission data loss detection system Transmission data loss detection system

2005-09-20

2005-09-20

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S052000, C714S821000

Reexamination Certificate

active

06948110

ABSTRACT:
In a sending unit, a deblocking circuit deblocks parent data into each piece of unit data, an ID-generating circuit generates an ID, and an ECC-generating circuit generates an ECC for a data sequence having unit data and an ID. A sending/receiving circuit sends the data sequence having the unit data and the ECC to a transmission path as send data. In the receiving unit, a sending/receiving circuit receives the send data as receive data. An ID-generating circuit generates an expected ID for the unit data in the receive data. An ECC calculating circuit calculates an expected ECC for the data sequence having the unit data and the expected ID. A compare circuit compares the ECC and the expected ECC. When both values are not identical, a resend-request circuit issues a resend request including the expected ID to the sending unit. When the ECC and the expected ECC are identical, a blocking circuit blocks each piece of unit data.

REFERENCES:
patent: 4654654 (1987-03-01), Butler et al.
patent: 5757826 (1998-05-01), Fredrickson
patent: 6005869 (1999-12-01), Sakai et al.
patent: 6275966 (2001-08-01), Sitterley
patent: 2002/0128009 (2002-09-01), Boch et al.
patent: 63-246049 (1988-10-01), None

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