Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2007-05-15
2007-05-15
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S086000, C326S090000, C327S108000
Reexamination Certificate
active
11129394
ABSTRACT:
To provide a transmission circuit which can adequately perform a fast data transmission even to a receiving circuit of a host controller or a device controller with a low sensitivity. A transmission circuit transmitting a signal through first and second signal lines that form a differential pair and includes a first terminating resistor terminating the first signal line, a second terminating resistor terminating the second signal line and a terminating resistance control circuit generating a control signal for controlling terminating resistance values of the first terminating resistor and the second terminating resistor. A first resistor takes a first resistance value if a first control signal is active, a nth resistor takes a nth resistance value if a nth control signal is active, the first-nth resistors are coupled, one end of the coupled first-nth resistors is coupled to a reference potential and the other end is coupled to the first signal line or the second signal line. The terminating resistance control circuit generates the first-nth control signals based on terminating resistance configuration information.
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Oliff & Berridg,e PLC
Seiko Epson Corporation
Tan Vibol
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