Transition insensitive timing recovery method and apparatus

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C342S442000, C375S373000, C375S375000, C455S180300

Reexamination Certificate

active

10355848

ABSTRACT:
A timing recovery circuit comprises a data-driven phase detector and a digital loop filter. The data-driven phase detector is operably coupled to determine at least a phase difference between an input signal and a feedback clock signal to produce a difference signal. Determining the phase difference can comprise digitally determining a timing difference between the input signal and the feedback clock signal, digitally determining a transition of the input signal to produce a transition detect signal, and digitally updating the timing difference based on the transition detect signal and the feedback clock signal. The timing difference can be digitally updated by pre-filtering the timing difference BY TAKING EVERY N TRANSITON OR AVERAGE OF EVERY N TRANSITIONS at a digital pre-filter, based on a pre-filter clock signal produced from the transition detect signal and the feedback clock signal, to produce the difference signal. The loop filter is operably coupled to filter the difference signal to produce a control voltage.

REFERENCES:
patent: 4847876 (1989-07-01), Baumbach et al.
patent: 5455540 (1995-10-01), Williams
patent: 5661765 (1997-08-01), Ishizu
patent: 5754437 (1998-05-01), Blazo
patent: 6008680 (1999-12-01), Kyles et al.
patent: 6166572 (2000-12-01), Yamaoka

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