Transistors having reinforcement layer patterns and methods...

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

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C257S024000, C257SE29193

Reexamination Certificate

active

11204564

ABSTRACT:
According to some embodiments of the invention, there is provided line photo masks that includes transistors having reinforcement layer patterns and methods of forming the same. The transistors and the methods provide a way of compensating a partially removed amount of a strained silicon layer during semiconductor fabrication processes. To the end, at least one gate pattern is disposed on an active region of a semiconductor substrate. Reinforcement layer patterns are formed to extend respectively from sidewalls of the gate pattern and disposed on a main surface of the semiconductor substrate. Each reinforcement layer pattern partially exposes each sidewall of the gate pattern. Impurity regions are disposed in the reinforcement layer patterns and the active region of the semiconductor substrate and overlap the gate pattern. Spacer patterns are disposed on the reinforcement layer patterns and partially cover the sidewalls of the gate pattern.

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patent: 6429061 (2002-08-01), Rim
patent: 6607948 (2003-08-01), Sugiyama et al.
patent: 2005/0090066 (2005-04-01), Zhu et al.
patent: 2005/0156154 (2005-07-01), Zhu et al.
patent: 2002-094060 (2002-03-01), None
patent: 2004-235345 (2004-08-01), None
patent: 1998-024988 (1998-07-01), None
patent: 2002-0010508 (2002-02-01), None

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