Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-03-15
2004-04-06
Zarneke, David A. (Department: 2829)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S410000, C257S411000, C438S216000, C438S261000, C438S591000
Reexamination Certificate
active
06717226
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to semiconductor processing, and more specifically, to gate dielectrics of semiconductors.
BACKGROUND
In semiconductor processing, a gate electrode lying over a gate dielectric is typically formed of polysilicon. The gate electrode is usually doped with boron to increase the conductivity of the gate electrode. During subsequent processing at temperatures greater than approximately 900 degrees Celsius, the boron diffuses through the gate dielectric to an underlying semiconductor substrate, undesirably making the underlying semiconductor substrate more conductive. The increased conductivity of the underlying semiconductor substrate, which is typically silicon, decreases the performance of a semiconductor device.
Typically, the gate dielectric is silicon dioxide (SiO
2
). Due to the scaling of semiconductor devices, however, SiO
2
is being replaced with high dielectric constant (high-k) materials, where the dielectric constant is greater than approximately the dielectric constant of SiO
2
Since the high-k materials being proposed for the gate dielectric, especially hafnium oxide (HfO
2
), are generally less amorphous than SiO
2
the high-k materials permit more boron to diffuse through the high-k material to the semiconductor substrate. Therefore, a need exists for a gate dielectric that has a high dielectric constant and substantially prevents boron diffusion from the gate electrode to the semiconductor substrate.
REFERENCES:
patent: 5153701 (1992-10-01), Roy
patent: 5292673 (1994-03-01), Shinriki et al.
patent: 5885877 (1999-03-01), Gardner et al.
patent: 6090686 (2000-07-01), Brady et al.
patent: 6235594 (2001-05-01), Merchant et al.
patent: 6320244 (2001-11-01), Alers et al.
patent: 6340827 (2002-01-01), Choi et al.
patent: 6407435 (2002-06-01), Ma et al.
patent: 6444592 (2002-09-01), Ballantine et al.
patent: 6451641 (2002-09-01), Halliyal et al.
patent: 2001/0013629 (2001-08-01), Bai
patent: 2001/0024387 (2001-09-01), Raaijmakers et al.
patent: 2001/0053601 (2001-12-01), Mogami
patent: 2002/0115252 (2002-08-01), Haukka et al.
patent: 19903598 (2000-08-01), None
patent: 1124262 (2001-08-01), None
D. Prot et al., “Self-diffusion in &agr;-A12O3IL Oxygen diffusion in ‘undoped’ single crystals”, 1996 Taylor & Francis Ltd., Philosophical Magazine A, 1996, vol. 73, No. 4, pp. 899-917.
H. Bender et al., “Physical Characterisation of High-k Gate Stacks Deposited on HF-Last Surfaces”, IWGI 3002, Tokyo, pp. 1-7.
R.J. Carter et al., “Electrical Characterisation of High-K Materials Prepared by Atomic Layer CVD”, IWGI 2001, Tokyo, pp. 1-6.
L. Manchanda et al., “Multi-component high-K gate dielectrics for the silicon industry”, Elsevier Science B.V., pp. 351-359.
V.V. Afanas'evaet al., “Energy barriers between (100)Si and Al2O3and ZrO2-based dielectric stacks: internal electron photoemission measurements”, 2001 Elsevier Science B.V. All rights reserved, pp. 335-339.
Massimo Fischetti et al., “IBM Research Report”, RC 22092 (99048) Jun. 12, 2001, pp. 1-25.
D.A. Neumayer et al., “Materials characterization of ZrO2-SiO2and HfO2-SiO2binary oxides deposited by chemical solution deposition”, 2001 American Institute of Physics, Journal of Applied Physics, vol. 90, No. 4, Aug. 15, 2001, pp. 1801-1808.
Toyokazu Tambo et al., “Molecular Beam Epitaxy of SrTiO3Films on Si(100)-2x1 with SrO Buffer Layer”, 1998 Publication Board, Japanese Journal of Applied Physics, Jpn. J. Appl. Phys. vol. 37 (1998), pp. 4454-4459.
PCT International Search Report (PCT/US03/07745).
Borucki Leonard J.
Gilmer David C.
Hegde Rama I.
Hobbs Christopher C.
Liu Chun-Li
Clingan, Jr. James L.
Motorola Inc.
Sarkar Asok Kumar
Vo Kim-Marie
Zarneke David A.
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