Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1997-06-09
1999-07-27
Chaudhuri, Olik
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
438527, 438766, 257347, H01L 21265, H01L 2924
Patent
active
059306424
ABSTRACT:
A transistor with a buried insulative layer beneath a channel region is disclosed. Unlike conventional SIMOX, the buried insulative layer has a top surface beneath the channel region that is closer than bottom surfaces of the source and drain to the top surface of the substrate. Preferably, the buried insulative layer is formed by implanting oxygen into the substrate and then performing a high-temperature anneal so that the implanted oxygen reacts with silicon in the substrate to form a continuous stoichiometric layer of silicon dioxide. Advantageously, the buried insulative layer provides a diffusion barrier and an electrical isolation barrier for the channel region.
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Silicon Processing for the VLSI Era--vol. 2: Process Integration, by S. Wolf, published by Lattice Press, Sunset Beach, CA, 1987, pp. 72-75.
Dawson Robert
Fulford Jr. H. Jim
Gardner Mark I.
Hause Frederick N.
Michael Mark W.
Advanced Micro Devices , Inc.
Chaudhuri Olik
Coleman William David
Holloway William W.
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