Transistor structures

Details Transistor structures Transistor structures

2007-03-08

2010-02-09

Loke, Steven (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

C438S259000, C257SE21639

Reexamination Certificate

active

07659560

ABSTRACT:
A transistor gate forming method includes forming a metal layer within a line opening and forming a fill layer within the opening over the metal layer. The fill layer is substantially selectively etchable with respect to the metal layer. A transistor structure includes a line opening, a dielectric layer within the opening, a metal layer over the dielectric layer within the opening, and a fill layer over the metal layer within the opening. The metal layer/fill layer combination exhibits less intrinsic less than would otherwise exist if the fill layer were replaced by an increased thickness of the metal layer. The inventions apply at least to 3-D transistor structures.

REFERENCES:
patent: 4878994 (1989-11-01), Jucha et al.
patent: 5013680 (1991-05-01), Lowrey et al.
patent: 5122848 (1992-06-01), Lee et al.
patent: 5885864 (1999-03-01), Ma
patent: 5909618 (1999-06-01), Forbes et al.
patent: 5960270 (1999-09-01), Misra et al.
patent: 5963469 (1999-10-01), Forbes
patent: 5977579 (1999-11-01), Noble
patent: 6072209 (2000-06-01), Noble et al.
patent: 6150687 (2000-11-01), Noble et al.
patent: 6157060 (2000-12-01), Kerber
patent: 6191470 (2001-02-01), Forbes et al.
patent: 6225168 (2001-05-01), Gardner et al.
patent: 6310367 (2001-10-01), Yagishita et al.
patent: 6498062 (2002-12-01), Durcan et al.
patent: 6625373 (2003-02-01), Kim
patent: 6696746 (2004-02-01), Farrar et al.
patent: 6770556 (2004-08-01), Yau et al.
patent: 6844591 (2005-01-01), Tran
patent: 6893910 (2005-05-01), Woo et al.
patent: 7012024 (2006-03-01), Abbott
patent: 7071043 (2006-07-01), Tang et al.
patent: 7081409 (2006-07-01), Kang et al.
patent: 7122425 (2006-10-01), Chance et al.
patent: 7148100 (2006-12-01), Kim et al.
patent: 7160789 (2007-01-01), Park et al.
patent: 7214621 (2007-05-01), Nejad et al.
patent: 7244659 (2007-07-01), Tang et al.
patent: 7253053 (2007-08-01), Eppich et al.
patent: 7262089 (2007-08-01), Abbott et al.
patent: 7282401 (2007-10-01), Juengling
patent: 7285812 (2007-10-01), Tang et al.
patent: 7349232 (2008-03-01), Wang et al.
patent: 7384849 (2008-06-01), Parekh et al.
patent: 2002/0048920 (2002-04-01), Pan
patent: 2004/0041188 (2004-03-01), Bissey et al.
patent: 2004/0183129 (2004-09-01), Williams et al.
patent: 2005/0051854 (2005-03-01), Cabral, Jr. et al.
patent: 2005/0056887 (2005-03-01), Tran
patent: 2005/0095794 (2005-05-01), Park
patent: 2006/0081948 (2006-04-01), Lim et al.
patent: 2006/0118846 (2006-06-01), Bissey et al.
patent: 2006/0141708 (2006-06-01), Kim et al.
patent: 2006/0289919 (2006-12-01), Juengling
patent: 2007/0007571 (2007-01-01), Lindsay et al.
patent: 2007/0018223 (2007-01-01), Abbott
Changhyun Cho, et al., “A 6F2 DRAM Technology in 60nm era for Gigabit Densities”, Symposium on VLSI Technology Digest of Technical Papers, 2005, pp. 36-37.
Wolf, et al., “Silicon Processing for the VLSI Era”, Lattice Press, vol. 1, Second Edition, pp. 110-111.
J.Y. Kim et al., “The Breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor (RCAT) for 88nm feature size and beyond”, Symposium on VLSI Technology Digest of Technical Papers, 2003, pp. 11-12.

Affiliated with

Also associated with

Rating

Transistor structures does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Transistor structures, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Transistor structures will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4169596