Transistor structure having stressed regions of opposite...

Details Transistor structure having stressed regions of opposite... Transistor structure having stressed regions of opposite...

2007-09-18

2007-09-18

Pham, Thanhha S. (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S349000, C257SE27062

Reexamination Certificate

active

10905586

ABSTRACT:
An integrated circuit and method of fabrication are provided in which the integrated circuit includes a field effect transistor (FET) having a channel region and source and drain regions adjacent to the channel region. A first stressed region having a first type of stress is provided to underlie the channel region, in which the first type of stress is either compressive type or tensile type. Second stressed regions having a second type of stress are provided to underlie the source and drain regions, in which the second type of stress is an opposite one of the compressive type or tensile type stress of the first stressed region.

REFERENCES:
patent: 2006/0003597 (2006-01-01), Golonzka et al.

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