Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-06-30
2004-05-18
Thomas, Tom (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S383000, C257S384000, C257S412000, C257S413000, C257S576000
Reexamination Certificate
active
06737710
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to the field of semiconductor integrated circuits, and more particularly relates to metal-oxide-semiconductor (MOS) field effect transistors (FETs).
2. Background
For many years integrated circuits incorporating metal-oxide-semiconductor field effect transistors (MOSFETs) have been manufactured with materials such as doped polycrystalline silicon to form the gate electrode, and doped crystalline silicon to form the source/drain terminals. Significant effort has been devoted to scaling down the physical dimensions of MOSFETs in order to increase the functionality of integrated circuits by including more transistors on each integrated circuit.
As devices were scaled down in size, there was a corresponding increase in the resistances associated with the source/drain terminals. Typically, as the linear dimensions of transistors were reduced, the depth of the source/drain terminals was reduced. The thickness of the source/drain terminals, i.e., junction depth, was reduced, as required for maintaining appropriate electrical characteristics in the scaled down MOSFETs. With thickness, that is, the junction depth, of the source/drain terminals reduced, the cross-sectional area of the source/drain terminals was reduced, which resulted in greater electrical resistance to signals propagating through the source/drain terminals.
What is needed are structures that provide low sheet resistivities for MOSFET source/drain terminals, and methods for making the same.
SUMMARY OF THE INVENTION
Briefly, a MOSFET includes a double silicided source/drain structure wherein the source/drain terminals include a silicided source/drain extension, a deep silicided source/drain region, and a doped semiconductor portion that surrounds a portion of the source/drain structure such that the silicides are isolated from the MOSFET body node.
In a further aspect of the present invention, a barrier layer is formed around a gate electrode to prevent electrical shorts between a silicided source/drain extension and the gate electrode. A deep source/drain is then formed, self-aligned to sidewall spacers that are formed subsequent to the silicidation of the source/drain extension.
REFERENCES:
patent: 4998150 (1991-03-01), Rodder et al.
patent: 5221853 (1993-06-01), Joshi et al.
patent: 5352631 (1994-10-01), Sitaram et al.
patent: 5665993 (1997-09-01), Keller et al.
patent: 5710438 (1998-01-01), Oda et al.
patent: 5710450 (1998-01-01), Chau et al.
patent: 5780896 (1998-07-01), Ono
patent: 5864161 (1999-01-01), Mitani et al.
patent: 5880500 (1999-03-01), Iwata et al.
patent: 5883418 (1999-03-01), Kimura
patent: 5937319 (1999-08-01), Xiang et al.
patent: 5937325 (1999-08-01), Ishida
patent: 5945719 (1999-08-01), Tsuda
patent: 5982001 (1999-11-01), Wu
patent: 6013569 (2000-01-01), Lur et al.
patent: 6018179 (2000-01-01), Gardnet et al.
patent: 6025241 (2000-02-01), Lin et al.
patent: 6037232 (2000-03-01), Wieczorek et al.
patent: 6049114 (2000-04-01), Maiti et al.
patent: 6063681 (2000-05-01), Son
patent: 6121100 (2000-09-01), Andideh et al.
patent: 6153455 (2000-11-01), Ling et al.
patent: 6162717 (2000-12-01), Yeh
patent: 6165913 (2000-12-01), Lin et al.
patent: 6169005 (2001-01-01), Kepler et al.
patent: 6198142 (2001-03-01), Chau et al.
patent: 6255703 (2001-07-01), Hause et al.
patent: 6258646 (2001-07-01), Fulford, Jr. et al.
patent: 6274450 (2001-08-01), Lin et al.
patent: 02054536 (1990-02-01), None
patent: 03009530 (1991-01-01), None
patent: 403209771 (1991-09-01), None
patent: 363133672 (1998-06-01), None
patent: 404134866 (1998-06-01), None
Bai Gang
Cheng Peng
Doyle Brian
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Ortiz Edgardo
Thomas Tom
LandOfFree
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