Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-03-01
2011-03-01
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S118000, C716S119000, C716S124000
Reexamination Certificate
active
07900176
ABSTRACT:
A structure for controlling the size of a transistor may include: an active region; a first gate line on the active region; one or more second gate lines on the active region; and source or drain regions arranged in three or more divided active regions that result from the first gate line and the one or more second gate lines dividing the active region into the divided active regions. A method of controlling the size of a transistor may include: arranging an active region; arranging a first gate line on the active region; arranging one or more second gate lines on the active region; arranging source or drain regions in three or more divided active regions; and controlling the size of the transistor by connecting to each other or separating from each other the source or drain regions using upper wires.
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Kim Joung-yeal
Kim Sung-hoon
Harness & Dickey & Pierce P.L.C.
Samsung Electronics Co,. Ltd.
Siek Vuthe
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