Transistor fabrication method

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C438S945000

Reexamination Certificate

active

08030199

ABSTRACT:
A method of forming low stack height transistors having controllable linewidth in an integrated circuit without channeling is disclosed. A disposable hardmask of doped glass is utilized to define the gate and subsequently protect the gate (and the underlying substrate) during ion implantation which forms the source and drains. A variety of silicided and non-silicided) structures may be formed.

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Wolf, Stanley, Ph.D.; “Silicon Processing for the VLSI ERA—vol. 1—Process Technology”;Lattice Press; p. 184.
Wolf, Stanley, Ph.D.; “Silicon Processing for the VLSI ERA—vol. 2—Process Technology”;Lattice Press; pp. 273-275.

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