Transistor element having an anisotropic high-k gate dielectric

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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C438S216000, C438S261000, C438S421000, C438S591000, C438S595000, C257S410000, C257S411000

Reexamination Certificate

active

06911404

ABSTRACT:
A field effect transistor comprises a gate insulation layer including an anisotropic dielectric. The orientation is selected such that a first permittivity parallel to the gate insulation layer is significantly less than a second permittivity perpendicular to the gate insulation layer.

REFERENCES:
patent: 4200474 (1980-04-01), Morris
patent: 6262462 (2001-07-01), Marshall et al.
patent: 2002/0000593 (2002-01-01), Nishiyama et al.
patent: 2002/0093046 (2002-07-01), Moriya et al.
patent: WO 02/41378 (2002-05-01), None
patent: WO 02/054495 (2002-07-01), None
IBM Technical Disclosure Bulletin, “Process for Fabricating Small High Value Capacitors,” vol. 32, No. 4B, Sep. 1989.

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