Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-06-30
2001-01-09
Hardy, David (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S336000, C257S344000, C257S355000, C257S356000, C257S357000
Reexamination Certificate
active
06172401
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to the field of integrated circuit devices and more particularly to improved scalable transistor devices for use in high performance circuits.
2. Description of Related Art
One goal of designers and manufacturers of computer systems and computer system components is the reduction in power consumption. Reduced power consumption yields improved heat dissipation characteristics for high density integrated circuit components and computer systems. One way to decrease power consumption of an integrated circuit device is to lower its operating voltage. Advances in semiconductor processing technology and integrated circuit design have reduced the operating voltages of many complementary metal oxide semiconductor (CMOS) integrated circuit devices from 5 volts to 3.3 volts to 1.8 volts. Current and future generations of processing technology will provide for components that operate at even lower voltages.
The operating voltage of a particular component is significant because it often determines the voltage swing, or high and low levels of input and output signals, associated with that component. For example, a device with an operating voltage of 1.8 volts may receive input signals and generate output signals that vary from 0 volts to 1.8 volts in magnitude. While this is not always true, such as in the case where low voltage swing transmission logic is used, many integrated circuit components receive input signals and generate output signals with voltage swings determined by their operating voltage or V
CC
.
While components designed and manufactured to operate at lower voltages provide reduced power consumption, it is not feasible for all integrated circuit components to be redesigned and transferred to new lower voltage processes simultaneously. Thus, a lower voltage integrated circuit component must often be capable of interfacing or communicating with higher voltage components in a computer system. The higher voltage signals from higher voltage integrated circuit components are alternatively referred to herein as “legacy signals.”
One approach to addressing this issue relies on NMOS pass gates integrated on the lower voltage chip near its inputs. The NMOS pass gates reduce the legacy signal voltage and clamp it in a safe range such that it is usable by the rest of the chip. There is an issue, however, when the lower voltage process used to manufacture the chip cannot tolerate the high voltage of the legacy signals.
Integrated circuit components fabricated to operate at lower voltages typically have reduced gate oxide thicknesses as compared to their high voltage counterparts. Thinner gate oxides decrease the ability of transistors to withstand high gate-to-source voltages without experiencing either gradual or catastrophic failure. Catastrophic failure results when a voltage applied to a transistor is higher than the transistor breakdown voltage. The thinner gate oxides of lower voltage components can reduce transistor breakdown voltages significantly. Thus, the use of integrated pass gates to reduce the voltage of legacy signals is not a viable approach where the transistor breakdown voltage of the pass gate is lower than or near the input voltage range.
Another approach for interfacing low voltage integrated circuit components with legacy signals uses external buffer devices to decrease the voltage of a signal to a usable level before it reaches the low voltage integrated circuit component input buffer. Each external buffer used, however, introduces a signal delay. With the increased operating frequencies of many computers and tighter timing restrictions on clock signals, this approach is not viable in many high frequency operating environments. Further, external buffers take up additional space in the computer system reducing design flexibility and adding to the overall system cost. It is desirable to have a method for allowing integrated circuit components with low operating voltages to receive higher voltage signals without adding unacceptable signal delays or compromising transistor reliability.
Integrated circuit device performance depends on many factors including, but not limited to, device size. In general, the smaller the channel length of a transistor device, for example, the faster the device. It is not uncommon, however, to have an integrated circuit that contains both short channel devices (e.g., less than 0.25 &mgr;m) and long channel devices (e.g., greater than 0.25 &mgr;m), with the latter devices used in many analog and Input/Output (I/O) circuits. Coupling the formation of both the long and short channel devices of an integrated circuit together ignores the different influences of the processing steps, e.g., dopant implantation, etc., has on devices of different length. Such coupling degrades performance. Therefore, it is also desirable to have a method for improving the performance of discreet devices of an integrated circuit with or without coupling the formation steps of various devices.
BRIEF SUMMARY OF THE INVENTION
The invention relates to a circuit device. The circuit device includes a gate overlying an area of a semiconductor substrate. A well is formed in the substrate, a first portion of which is doped with a first concentration of a first dopant proximate a first edge of the gate. A channel region doped with a first concentration of a second dopant underlies a portion of the gate and is adjacent the well. A non-conducting region is formed in the first portion of the well. Finally, the circuit device includes a contact to a second portion of the well distal from the second edge of the gate.
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Blakely , Sokoloff, Taylor & Zafman LLP
Hardy David
Intel Corporation
Ortiz Edgardo
LandOfFree
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