Transistor and a capacitor used for forming a vertically stacked

Details Transistor and a capacitor used for forming a vertically stacked Transistor and a capacitor used for forming a vertically stacked

1993-07-12

1994-03-01

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Capacitors

365150, G11C 1300, G11C 1124

Patent

active

052914380

ABSTRACT:
A transistor and a capacitor is used to provide, in one form, a dynamic random access memory (DRAM) cell (10). The capacitor of cell (10) lies within a substrate (12). The capacitor has a first capacitor electrode (16) and a second capacitor electrode (20). A dielectric layer (18) is formed as an inter-electrode capacitor dielectric. A first transistor current electrode (36) is formed overlying and electrically connected to the first capacitor electrode (16). A channel region (38) is formed overlying the first transistor current electrode (36). A second transistor current electrode (40) is formed overlying the channel region (38). A conductive layer (30) is formed laterally adjacent the channel region (38) and isolated from the substrate (12) by dielectric layers (22 and 28). A conductive layer (30) functions as a gate electrode for the transistor and a sidewall dielectric (34) functions as a gate dielectric. The combination of a cylindrical dual-sidewall surface area capacitor for a large capacitance, along with a vertical transistor physically overlying the capacitor, forms a very dense and efficient DRAM structure.

REFERENCES:
patent: 4686552 (1987-08-01), Teng et al.
patent: 4713678 (1987-12-01), Womack et al.
patent: 4797719 (1989-01-01), Ueda
patent: 4803535 (1989-02-01), Taguchi
patent: 5047815 (1991-09-01), Yasuhira et al.
patent: 5055898 (1991-10-01), Beilstein et al.
patent: 5126280 (1992-06-01), Chan et al.
A Trench Transistor Cross-Point DRAM Cell, by W. F. Richardson et al., was published and presented at the IEEE IEDM Conference 1985, pp. 714-717.

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