Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-08-17
2004-03-09
Eckert, George (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S342000, C257S339000, C257S328000, C257S262000, C257S263000, C257S139000, C257S302000, C257S333000
Reexamination Certificate
active
06703665
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the art of a field-effect transistor such as a MOSFET, an IGBT, or the like.
DESCRIPTION OF THE RELATED ART
One conventional MOSFET will be described below with reference to 
FIGS. 39 and 40
 of the accompanying drawings.
As shown in 
FIG. 39
, a conventional MOSFET 
101
 disclosed in literature comprises a drain layer 
105
 of single crystal of silicon and doped with a high concentration of an N
+
-type impurity, and an N
−
-type conductive layer 
106
 deposited on the drain layer 
105
 by epitaxial growth. The conductive layer 
106
 includes base regions 
112
 formed by diffusing a P-type impurity from the surface thereof.
Each of the base legions 
112
 includes a ring-shaped source region 
114
 formed by diffusing an N-type impurity from the surface thereof. A channel region 
115
 lies between the outer end of the base region 
112
 and the outer peripheral edge of the source region 
114
.
The base region 
112
, the source region 
114
, and the channel region 
115
 make up one rectangular cell 
117
. The MOSFET 
101
 has a number of cells 
117
 that are arranged regularly in a grid-like pattern.
FIG. 40
 shows the layout of the cells 
117
 of the MOSFET 
101
.
A gate insulating film 
121
 in the form of a silicon oxide film is disposed on the channel regions 
115
 of adjacent two of the cells 
117
 and the surface of the conductive layer 
106
 between those two cells 
117
. A gate electrode film 
131
 is disposed on the gate insulating film 
121
.
The base region 
112
 has a surface exposed inside of the ring shaped source region 
114
. An inter layer insulation film 
122
 is disposed on the gate electrode film 
131
.
Reference numeral 
132
 represents a part of the source electrode film deposited on the surface of the source region 
114
 and the base region 
112
 and a part deposited on the interlayer insulation film 
122
. Those two parts are connected each other.
The source electrode film also has a part deposited on the surface of gate electrode film 
131
 and is insulated from the part of the source electrode film deposited on the surface of the source region 
114
 and base region 
112
 and the part deposited on the interlayer insulation film 
122
.
The MOSFET 
101
 also has a protective film 
135
 disposed on the source electrode films 
132
. The protective film 
135
 and the interlayer insulation films 
122
 are patterned to expose portions of the source electrode films 
132
 and also portions of the thin metal film connected to the gate electrode films 
131
.
A drain electrode 
133
 is disposed on the surface of the drain layer 
105
 remotely from the conductive layer 
106
. The drain electrode 
133
, the exposed portions of the source electrode films 
132
, and the exposed portions of the thin metal film connected to the gate electrode films 
131
 are connected to respective external terminals which are connected to an electric circuit for operating the MOSFET 
101
.
To operate the MOSFET 
101
, the source electrode films 
132
 are placed on a ground potential, and a positive voltage is applied to the drain electrode 
133
. When a gate voltage (positive voltage) equal to or higher than a threshold voltage is then applied to the gate electrode films 
131
, an N-type inverted layer is formed on the surface of the P-type channel region 
115
 of each cell 
117
, and the source region 
114
 and the conductive layer 
106
 are connected to each other by the inverted layer, so that a current flows from the drain electrode 
133
 to the source electrode films 
132
.
When a voltage, e.g., a ground potential, lower than the threshold voltage is thereafter applied to the gate electrode films 
131
, the inverted layer is eliminated, and the base regions 
112
 and the conductive layer 
106
 are reverse-biased, so that no current flows between the drain electrode 
133
 and the source electrode films 
132
.
Therefore, the drain electrode 
133
 and the source electrode films 
132
 can be connected to each other or disconnected from each other by controlling the voltage applied to the gate electrode films 
131
. The MOSFET 
101
 is widely used as a high-speed switch in power electric circuits such as power supply circuits, motor control circuits, etc.
While the drain electrode 
133
 and the source electrode films 
132
 are being disconnected from each other, a large voltage may be applied between the drain electrode 
133
 and the source electrode films 
132
.
Since the base regions 
112
 including the channel regions 
115
 and the conductive layer 
106
 are reverse-biased while the drain electrode 
133
 and the source electrode films 
132
 are being disconnected from each other, the withstand voltage, i.e. the avalanche breakdown voltage, of the MOSFET 
101
 is determined by the withstand voltage of the PN junction between the base regions 
112
 and the conductive layer 
106
.
PN junctions are classified into a planar junction, a cylindrical junction, and a spherical junction according to the shape of a diffusion layer of higher concentration. It is known that the planar junction has a highest withstand voltage and the spherical junction has a lowest withstand voltage.
In the MOSFET 
101
 composed of the many cells 
117
, the planar junction is formed at the bottom of each of the cells 
117
. However, since the cells 
117
 are polygonal, e.g., rectangular, in shape, the cylindrical junction is necessarily formed at the sides of each of the cells 
117
 and the spherical junction is necessarily formed at the top of each of the cells 
117
. The overall withstand voltage is determined by the withstand voltage at the top of each of the cells 
117
.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a transistor having a high withstand voltage.
Another object of the present invention is to provide a transistor having a low conduction resistance.
To achieve the above objects, there is provided in accordance with the present invention a transistor comprising a semiconductor substrate having a drain layer of a first conductivity type and a withstand voltage region of a second conductivity type disposed on the drain layer, a conductive region of the first conductivity type formed by an impurity partly diffused into the semiconductor substrate from the side of the withstand voltage region side, the conductive region layer of the first conductivity type having a bottom connected to the drain, a base region of the second conductivity type formed by an impurity partly diffused into the semiconductor substrate from the side of the withstand voltage region side, a source region of the first conductivity type formed in the base region, a gate insulating film having a central region positioned on the base region, an end positioned on the conductive region, and an opposite end positioned on the source region, a gate electrode film disposed on the gate insulating film, a channel region positioned between the source region and the conductive region and including a surface of the base region below the gate insulating film, a source electrode electrically connected to the source region and the base region, and a drain electrode electrically connected to the drain layer.
The base region has a surface concentration higher than the surface concentration of the withstand voltage region.
The conductive region has a surface concentration higher than the surface concentration of the withstand voltage region.
The base region has a surface concentration higher than the surface concentration of the conductive region.
The conductive region has a surface surrounded by a region having a conductivity type opposite to the conductivity type of the conductive region.
The base region is diffused from a surface of the withstand voltage region and a surface of the conductive region, and the bottom of the base region has a part in contact with the withstand voltage region and a part in contact with the conductive region.
The base region has a portion positioned within the conductive region and serving as the channel region.
T
Armstrong, Kratz, Quintos Hanson & Brooks, LLP.
Eckert George
Nguyen Joseph
Shindengen Electric Manufacturing Co. Ltd.
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