Transistor

Details Transistor Transistor

1999-08-13

2001-08-21

Loke, Steven (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S330000, C257S332000

Reexamination Certificate

active

06278161

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a metal oxide semiconductor field effect transistor (MOSFET) and to a fabrication method thereof, and more particularly to a transistor for a MOSFET for a semiconductor device and a fabrication method thereof that controls a channel length.
2. Description of the Conventional Art
In a conventional MOSFET, a channel region is formed in a semiconductor substrate.
FIGS. 1A through 1C
illustrate a fabrication method of a conventional MOSFET.
A first oxide
2
and a polycrystalline silicon film
3
are sequentially formed on a semiconductor substrate
1
and then a first photoresist film (not shown) is formed on the polycrystalline silicon film
3
. Then, the first photoresist film is patterned by being selectively exposed to optical radiation and then developed, so that a pattern of the first photoresist film partially remains at a portion on which a gate electrode is to be formed. As shown in
FIG. 1A
, using the patterned first photoresist film as a mask, the first oxide
2
and the polycrystalline silicon film
3
are selectively etched and then the patterned first photoresist film remaining on the polycrystalline silicon film
3
is removed. Here, the etched polycrystalline silicon film
3
and the first oxide
2
shown in
FIG. 1A
become a gate electrode and a gate oxide, respectively, of a MOSFET. As shown in
FIG. 1B
, impurity ions are implanted into the entire exposed surface of the semiconductor substrate using the polycrystalline silicon film
3
as a mask and then drive-in diffused, thereby forming a first source-drain impurity region
4
the dopant density of which is lower than that of a second source-drain impurity region
6
which will be formed in a following process. Then, a second oxide is formed on the polycrystalline silicon film
3
and the semiconductor substrate
1
and the second oxide is etched-back, so that the second oxide remains only at side surfaces of the polycrystalline silicon film
3
, as shown in
FIG. 1C
, thereby forming sidewalls
5
of the second oxide. Next, using the polycrystalline silicon film
3
and the sidewalls
5
as a mask, impurity ions at high density are implanted into the surface of the semiconductor substrate
1
and drive-in diffused, thereby forming the second source-drain impurity regions
6
, thus completing the fabrication of the conventional MOSFET.
However, the fabrication method of the conventional MOSFET has a problem, in that since the gate oxide is obtained by etching the first oxide, time dependent dielectric breakdown (TDDB) can occur due to damage incurred during the etching process, which results in deterioration of the gate oxide. Also, in the MOSFET, since the channel length can not be controlled, integration of a device increases, which results in a short channel effect and risk of a punch through defect. Accordingly, since the device geometry can not be controlled, a modeling of the device is difficult and a large margin for the device is required in the device fabrication, thus reducing mass-productibility.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a MOSFET and a fabrication method thereof which obviates the problems and disadvantages in the conventional art.
An object of the present invention is to provide a MOSFET and a fabrication method thereof that controls a channel length, thereby enabling modeling of the device and improving its mass-producibility.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described herein, there is provided a MOSFET which includes: a semiconductor substrate having a trench formed therein; an insulating film formed in the trench; a gate electrode formed on the insulating film; a gate oxide formed on the gate electrode, on the insulating film and on an adjacent portion of the semiconductor substrate; a first silicon film formed on the semiconductor substrate and on a portion of the gate oxide; and a second silicon film formed on a portion of the gate oxide on which the first silicon film is not formed.
Also, to achieve the objects of the present invention, there is provided a fabrication method of a MOSFET includes: forming a trench in a semiconductor substrate; forming an insulating film in the trench; forming a gate electrode to fill in the trench; forming a gate oxide on the gate electrode, on the insulating film and on an adjacent portion of the semiconductor substrate; forming a first silicon film on the semiconductor substrate and on a portion of the gate oxide; and forming a second silicon film on a portion of the gate oxide on which the first silicon film is not formed.


REFERENCES:
patent: 5395780 (1995-03-01), Hwang
patent: 5486708 (1996-01-01), Takahashi et al.
patent: 5512517 (1996-04-01), Bryant
patent: 5844273 (1998-12-01), Konishi
patent: 5883399 (1999-03-01), Yin et al.
patent: 5915180 (1999-06-01), Hara et al.
patent: 5942767 (1999-08-01), Na et al.

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