Transient transceiver clock configuration

Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration

Reexamination Certificate

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Details

C713S002000, C710S313000

Reexamination Certificate

active

11074606

ABSTRACT:
A telecommunications system that includes an external memory, an internal memory and a system clock. A boot component is configured to use the clock signal generated by the system clock to load data from external memory into internal memory when the telecommunication system operates in initialization mode. The telecommunication system is configured to operate based on the loaded data in internal memory when the system operates in normal mode. Once the initialization mode is complete, the system clock may be shut down since the telecommunication system does not need the system clock to perform normal mode operations. Subsequently, the system clock may be restarted if need be. Accordingly, the system clock is generated when it is needed, but not continuously. Therefore, cross-talk between the system clock and the receive and transmit path is reduced.

REFERENCES:
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patent: 6952531 (2005-10-01), Aronson et al.
patent: 7058310 (2006-06-01), Aronson et al.
patent: 7162160 (2007-01-01), Aronson et al.
patent: 7184668 (2007-02-01), Aronson et al.
patent: 2006/0155978 (2006-07-01), David et al.

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