Transformation of graphs representing an electronic design...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07444603

ABSTRACT:
Methods and apparatus are provided for processing an electronic design in a high level modeling system. A first graph is generated, with the nodes representing basic elements of the electronic design and including a shared node representing the basic element of a block, a port, or a network of the electronic design. Multiple second graphs are generated modeling different aspects of the electronic design. A first and second member of the nodes and edges of respective ones of the second graphs are each associated with the shared node of the first graph. The different aspects of the electronic design of the second-type graphs transformed, with a first attribute of one of the second graphs written to the shared node using the first member, and a second attribute of another of the second graphs determined as a function of the first attribute read from the shared node using the second member.

REFERENCES:
patent: 5528508 (1996-06-01), Russell et al.
patent: 7089511 (2006-08-01), Allen et al.
patent: 7299458 (2007-11-01), Hammes

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