Electrical computers and digital processing systems: multicomput – Network computer configuring
Reexamination Certificate
2006-05-16
2006-05-16
Carrone, Jason (Department: 2145)
Electrical computers and digital processing systems: multicomput
Network computer configuring
C709S223000, C709S221000, C709S222000, C370S231000, C370S236000
Reexamination Certificate
active
07047284
ABSTRACT:
A transfer request bus and transfer request bus node is described which is suitable for use in a data transfer controller processing multiple concurrent transfer requests despite the attendant collisions which result when conflicting transfer requests occur. Transfer requests are passed from an upstream transfer request node to downstream transfer request node and then to a transfer request controller with queue. At each node a local transfer request can also be inserted to be passed on to the transfer controller queue. Collisions at each transfer request node are resolved using a token passing scheme wherein a transfer request node possessing the token allows a local request to be inserted in preference to the upstream request.
REFERENCES:
patent: 4982400 (1991-01-01), Ebersole
patent: 5724507 (1998-03-01), Iwatsuki et al.
patent: 6105079 (2000-08-01), Kuo et al.
patent: 6408351 (2002-06-01), Hamdi et al.
Agarwala Sanjive
Balmer Keith
Bhandal Amarjit S.
Comisky David A.
Fuoco Charles L.
Brady III W. James
Carrone Jason
Marshall, Jr. Robert D.
Mirza Adnan M.
Telecky , Jr. Frederick J.
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