Transceiver circuit and method of transmitting a signal which us

Electronic digital logic circuitry – Interface – Current driving

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326 85, H03K 190185

Patent

active

056525281

ABSTRACT:
A semiconductor integrated circuit device having an input/output circuit for inputting and outputting data having a GTL level includes a pull-down output MOSFET (Q1) and a pull-up output MOSFET (Q2) both electrically connected to an input/output terminal and a gate drive signal generating circuit (DPG) electrically coupled to the gate of the pull-up output MOSFET (Q2). Upon data transmission, the gate drive signal generating circuit (DPG) controls the operation of the output MOSFET (Q2) so that the output MOSFETs (Q1 and Q2) are contemporarily brought into an ON or OFF state according to data to be transmitted. On the other hand, upon data reception, the gate drive signal generating circuit (DPG) forms a control pulse for temporarily turning ON one of the output MOSFETS (Q2) immediately after high-level data has been received, and supplies it to a gate terminal of the output MOSFET (Q2).

REFERENCES:
patent: 4581551 (1986-04-01), Campbell, Jr.
patent: 4680487 (1987-07-01), Kobayashi
patent: 5347177 (1994-09-01), Lipp
patent: 5530377 (1996-06-01), Walls
"CMOS Small-Amplitude Interface Is Standardized To Give A Signal Amplitude of Smaller than 1 V"; published by Nikkei Electronics; Jun. 8, 1992; pp. 133-141 (with translation).

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