Tracking unity gain for edge rate and timing control

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S031000, C327S108000, C327S378000

Reexamination Certificate

active

10999781

ABSTRACT:
In general, in one aspect, the disclosure describes an apparatus for calibrating signals. The apparatus includes a unity gain detector to traverse a gain curve of an output buffer circuit to determine unity gain voltages associated with unity gain crossover points on an input voltage ramp. The apparatus further includes a pre-boost circuit to apply the unity gain voltages to at least one input/output buffer within the output buffer circuit.

REFERENCES:
patent: 6043682 (2000-03-01), Dabral et al.
patent: 6051998 (2000-04-01), Lee et al.
Konstadinidis, Georgios , et al., “Implementation of a Third-Generation 1.1GHz 64b Microprocessor”,ISSCC 2002/ Session 20/ Microprocessors/20.3, ISSCC 2002 Visuals Supplement /IEEE, (2002), 3 pgs.
Muljono, Harry , et al., “A 400MT/s 6.4GB/s Multiprocessor Bus Interface”,ISSCC 2003/ Session 19/ Processor Building Blocks/ Paper 19.3, 2003 IEEE International Solid-State Circuits Conference, (2003), 8 pgs.

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