Tracking deferred data transfers on a system-interconnect bus

Details Tracking deferred data transfers on a system-interconnect bus Tracking deferred data transfers on a system-interconnect bus

2006-05-23

2006-05-23

Ray, Gopal C. (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S313000, C714S048000

Reexamination Certificate

active

07051145

ABSTRACT:
Systems and techniques to track deferred data transfers on a system-interconnect bus. A deferral response initiates storage of information corresponding to the response and tracking of progress for a requested data transfer. A master device, such as a bus adapter, may include a split-transaction repository, timers, and a split-transaction monitor. The master device may include both hardware and firmware components, and may be designed to handle split responses as defined by a Peripheral Component Interconnect Extended standard.

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