Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2006-03-21
2006-03-21
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S205000, C365S189050, C365S194000
Reexamination Certificate
active
07016245
ABSTRACT:
An actual sense amplifier senses a signal received on a bit line to generate a bit, and a latch latches the bit at a time point specified by a latch enable signal. A tracking circuit generates the latch enable signal in an appropriate time window. The tracking circuit may contain a dummy sense amplifier implemented similar to the actual sense amplifier and a dummy column from which the actual sense amplifier senses a signal received upon accessing the dummy memory array. The latch enable signal may be generated after the dummy sense amplifier generates a bit representing the sensed signal. The time taken by the dummy sense amplifier to generate the bit depends on the load offered by the dummy memory array. Accordingly, the dummy memory array is designed to offer sufficient load to ensure that the latch enable signal is generated in an appropriate time window.
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Balasubramanian Suresh
Mishra Mohan
Sheffield Bryan D.
Spriggs Stephen Wayne
Brady III W. James
Elms Richard
Stewart Alan K.
Wendler Eric J.
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