Tracing multiple data access instructions

Details Tracing multiple data access instructions Tracing multiple data access instructions

2006-07-18

2006-07-18

Beausoleil, Robert (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S030000, C712S227000, C717S128000

Reexamination Certificate

active

07080289

ABSTRACT:
A microprocessor integrated circuit104is provided with a trace controller120that is responsive to trace initiating conditions to trigger commencement of tracing operation and generation of a trace data stream. In the case of a multi-word data transfer instruction LSM, the trace controller120is able to trigger tracing partway through that instruction such that a subset of the transfer specified by that instruction are included within the trace data stream. All transfers subsequent to the triggering transfer may be traced with those transfers subsequent to the triggering transfer being marked with place holder codes rather than more informative full trace data for the triggering transfer.

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