Trace delay error compensation

Details Trace delay error compensation Trace delay error compensation

2007-05-17

2009-12-15

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C356S032000

Reexamination Certificate

active

07634747

ABSTRACT:
A method of trace delay error compensation for measurements that are taken remotely from the signal source or receiver of a circuit uses data available from a computer aided design (CAD) tool to characterize electrical connections to an instrument measurement point, such as a connectorless probe, which is remote from the signal source or receiver. Extracted parameters from the CAD data are applied to signals acquired by the probe to adjust the signal timing and/or shape to more accurately represent the signal information timing at the signal source or receiver or other remote location of interest to a user. The corrected signals at the desired location may be displayed by a measurement instrument.

REFERENCES:
patent: 5452239 (1995-09-01), Dai et al.
patent: 5761097 (1998-06-01), Palermo
patent: 6321366 (2001-11-01), Tseng et al.
patent: 2007/0168147 (2007-07-01), Cannon et al.

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