Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-06-22
2003-02-04
Wong, Don (Department: 2821)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C370S257000
Reexamination Certificate
active
06516447
ABSTRACT:
TECHNICAL FIELD
The invention relates to a system and method of determining an Integrated Circuit (IC) package interconnect routing.
BACKGROUND
As designers strive to improve the capabilities of new ICs, minimization of circuit size continues to be an underlying goal. Recent developments in IC design have dramatically increased the power, speed, and capability of the IC. As the power, speed, and capability of ICs increase, the number of input output terminals that each IC is interconnected with has also increased.
Normally, Integrated Circuits (ICs) are placed inside a “package” before they can be installed on a Printed Circuit Board (PCB). IC Package Interconnect is the process of designing the electrical tracks between the terminals on the IC die and the pads on the package. Using Electronic Design Automatic (EDA) tools, the human designer takes net data from the IC die and footprint data from the PCB package. The designer then uses this data to design the electrical tracks within the package to connect the IC die to the substrate. Once these connections are made a connection is made to the package pins.
Only a few years ago, most packages had only a few dozen or at most a few hundred pads. The routing required to connect to these pads was not particularly difficult or time consuming. Modem Ball Grid Array (BGA) packages now routinely have hundreds or thousands of pads. Some have over ten thousand pads. A task that previously took a few hours can now take days or even weeks. Thus, an automated solution is needed.
One approach is to use design tools which require a designer to manually determine each interconnect wire in an IC package. As the complexity of IC packages has increased, such a solution has obvious shortcomings. Another approach is to use design tools such as “Advanced IC Packaging”™ by Zuken™ include a packaging specific auto-router, traded under the name “Radial Router”™. These routers use all-angle auto routing with packaging-specific algorithms. They use a direct line-of-sight approach to solving the problems specific to BGA and CSP rather than traditional horizontal/vertical routing. Innoveda™ also has a package design solution, traded under the name “PowerBGA”™. This tool has an optional router, which they call the “BGA Route Wizard”. This product appears to be similar in design to the Zuken Radial Router. While these other approaches are suitable for simple designs, they have difficulty providing routing solutions for complex ICs.
Therefore, it is highly desirable to provide an automated system and method to provide an optimal routing solution for highly complex IC packages.
SUMMARY
While automated IC package routing systems and methods exist, no automated system or method exists to provide routing to complex IC designs. In particular, no automated system or method exists to provide a routing solution for IC packages using large, multi-layer Ball Grid Array (BGA) designs. Therefore, it is desirable to provide a system and method of automated IC package routing for complex IC designs. One embodiment of the present invention utilizes Topological Global Routing to determine the optimal IC package routing solution. Embodiments of the present invention provide a system and method for automatically determining the optimal solution for IC Package Interconnect for large Ball Grid Array (BGA) designs.
Topological Global Routing provides a mathematical abstraction of the problem that allows multiple optimizations to be performed prior to detailed routing. In the special case of IC Package Interconnect, the algorithms are able to find the optimal solution in less time than other methods can find an approximate solution.
REFERENCES:
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patent: 6247161 (2001-06-01), Lambrecht et al.
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Kingsbury Glendine
Wadland Ken
Bingham & McCutchen LLP
Cadence Design Systems Inc.
Tran Chuc
Wong Don
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