Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-07-17
2007-07-17
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
11305253
ABSTRACT:
State nodes in a sequential digital circuit are identified using a graph-based method based upon the topology of the circuit. In accordance with the method, the device level circuit netlist is reduced to a graph representation using a well-defined set of rules. The unique properties of state nodes can be translated to properties of the graph representation of the circuit. Identification of state nodes is required for proper initialization of sequential circuits for simulation by a device level digital simulator.
REFERENCES:
patent: 6308300 (2001-10-01), Bushnell et al.
patent: 2006/0200787 (2006-09-01), Teene
Dastidar Tathagato Rai
Ray Partha
Dinh Paul
National Semiconductor Corporation
Nguyen Nha
Stallman & Pollock LLP
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