Topless semiconductor package

Details Topless semiconductor package Topless semiconductor package

2006-04-25

2006-04-25

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257S723000, C257S670000, C257S672000, C257S773000, C257S107000, C257S109000, C257S691000

Reexamination Certificate

active

07034385

ABSTRACT:
A semiconductor package which includes a die pad that is exposed through the top surface of its molded housing, a semiconductor die having one power electrode electrically and mechanically connected to the underside of the die pad, and another power electrode electrically connected to a lead.

REFERENCES:
patent: 5625226 (1997-04-01), Kinzer
patent: 6114750 (2000-09-01), Udagawa et al.
patent: 6242800 (2001-06-01), Munos
patent: 6281096 (2001-08-01), Ewer
patent: 6307272 (2001-10-01), Takahashi et al.
patent: 6667547 (2003-12-01), Woodworth et al.
patent: 6723582 (2004-04-01), Glenn et al.
patent: 6744124 (2004-06-01), Chang et al.
patent: 6909170 (2005-06-01), Chang et al.

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