Top-via etch technique for forming dielectric membranes

Details Top-via etch technique for forming dielectric membranes Top-via etch technique for forming dielectric membranes

1997-04-03

1998-12-29

Powell, William

Etching a substrate: processes

Etching of semiconductor material to produce an article...

216 41, 216 56, 438735, H01L 2100, B44C 122

Patent

active

058536019

ABSTRACT:
A top-via etch technique for forming dielectric membranes for thin film devices, the dielectric membrane being deposited on the upper planar surface of the substrate. After the thin film device is formed on the dielectric membrane, a photoresist etch mask is deposited on the entire upper planar surface of the substrate, including the thin film structure. Vias are formed through the dielectric membrane and the protective photoresist etch mask to expose the upper planar surface of the substrate along opposite first and second ends of the thin film device. The upper planar surface of the substrate is isotropically etched using a reactive ion etching technique for example, to form air gaps beneath the dielectric membrane. The etching process may be carried out in etch segments of predetermined intervals, each followed by a cool down period of a prescribed interval.

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patent: 5496436 (1996-03-01), Bernstein et al.

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