Top layers of metal for high performance IC's

Details Top layers of metal for high performance IC's Top layers of metal for high performance IC's

2005-06-09

2008-09-09

Wilczewski, M. (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S624000, C438S625000, C438S687000

Reexamination Certificate

active

07422976

ABSTRACT:
A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an inter-metal dielectric thus enabling the integration of very small integrated circuits within a larger circuit environment at a minimum cost in electrical circuit performance.

REFERENCES:
patent: 4152195 (1979-05-01), Bahrle et al.
patent: 4423547 (1984-01-01), Farrar et al.
patent: 4618878 (1986-10-01), Aoyama et al.
patent: 4723197 (1988-02-01), Takiar et al.
patent: 4978419 (1990-12-01), Nanda et al.
patent: 5055907 (1991-10-01), Jacobs
patent: 5083187 (1992-01-01), Lamson et al.
patent: 5106461 (1992-04-01), Volfson et al.
patent: 5212403 (1993-05-01), Nakanishi et al.
patent: 5384488 (1995-01-01), Golshan et al.
patent: 5468984 (1995-11-01), Efland et al.
patent: 5501006 (1996-03-01), Gehman, Jr. et al.
patent: 5635767 (1997-06-01), Wenzel et al.
patent: 5659201 (1997-08-01), Wollesen
patent: 5686764 (1997-11-01), Fulcher
patent: 5818110 (1998-10-01), Cronin
patent: 5827776 (1998-10-01), Bandyopadhyay et al.
patent: 5827778 (1998-10-01), Yamada
patent: 5834844 (1998-11-01), Akagawa et al.
patent: 5910020 (1999-06-01), Yamada
patent: 5924005 (1999-07-01), Waldo
patent: 5944537 (1999-08-01), Smith et al.
patent: 5953626 (1999-09-01), Hause et al.
patent: 5969424 (1999-10-01), Matsuki et al.
patent: 6001673 (1999-12-01), Marcinkiewicz
patent: 6020640 (2000-02-01), Efland et al.
patent: 6100548 (2000-08-01), Nguyen et al.
patent: 6107674 (2000-08-01), Zommer
patent: 6130457 (2000-10-01), Yu et al.
patent: 6144100 (2000-11-01), Shen et al.
patent: 6174393 (2001-01-01), Scheifele
patent: 6184143 (2001-02-01), Ohashi et al.
patent: 6229221 (2001-05-01), Kloen et al.
patent: 6265301 (2001-07-01), Lee et al.
patent: 6288442 (2001-09-01), Farrar
patent: 6335104 (2002-01-01), Sambucetti et al.
patent: 6472745 (2002-10-01), Iizuka
patent: 6614099 (2003-09-01), Farrar
patent: 6707159 (2004-03-01), Kumamoto et al.
patent: 6984891 (2006-01-01), Ahn et al.
patent: 7368376 (2008-05-01), Lin
patent: 7384864 (2008-06-01), Lin
patent: 2002/0064922 (2002-05-01), Lin
patent: 2007/0281458 (2007-12-01), Lin
patent: 2007/0281463 (2007-12-01), Lin
patent: 2007/0281467 (2007-12-01), Lin
patent: 2007/0281468 (2007-12-01), Lin
patent: 2007/0293036 (2007-12-01), Lin
patent: 2007/0293037 (2007-12-01), Lin
patent: 2008/0050909 (2008-02-01), Lin et al.
patent: 01-135043 (1989-05-01), None
patent: 01-183836 (1989-07-01), None
patent: 01-184848 (1989-07-01), None
patent: 01-184849 (1989-07-01), None
patent: 04-316351 (1992-11-01), None
Stanley Wolf, Ph.D.,Silicon Processing for the VLSI Era: vol. 2 Process Integration, Lattice Press, Sunset Beach, CA, USA.
Copyright 1990, pp. 214-217, 282-285.

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