Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-01-09
2001-07-24
Lebentritt, Michael (Department: 2824)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S712000, C438S729000, C438S524000, C438S528000
Reexamination Certificate
active
06265317
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to the general field of shallow trench formation with particular reference to top edge rounding.
BACKGROUND OF THE INVENTION
Shallow trench isolation (STI) is now widely used as means to provide electrical isolation between circuits in a silicon chip. This is illustrated in
FIG. 1
which depicts a silicon body
11
in whose upper surface trench
13
has been formed and then filled with dielectric
12
. In general, silicon body
11
will include a number of layers and regions that make up integrated circuits (not shown) and dielectric-filled trenches such as
13
serve to isolate these circuits from one another.
Since the walls of trench
13
deviate by only a few degrees from the vertical (typically about 3-5°) they meet the top surface at an angle that is close to 90° making for very sharp corners
15
at the rim of the trench. Sharp corners such as these are highly undesirable because the gate oxide layer cannot then be deposited with uniform thickness, which leads to a deterioration of device electrical performance.
Several processes for smoothing the upper corners of etched trenches have already been described in the prior art. To illustrate one of the more popular among these, we refer now to FIG.
2
. Shown there is hard mask
21
of silicon nitride which lies on the top surface of silicon body
11
with an intervening layer
22
of pad oxide (that helps to reduce stress). Layer
21
has already been patterned by standard photolithographic processes into the shape of a mask that defines the opening of trench
13
, the latter having then been formed using standard etching processes.
Referring now to
FIG. 3
, the process of the prior art then selectively etches the layer
22
of pad oxide causing it to pull back from both the top surface of
11
and the undersurface of
21
to form notch
25
. This is followed by thermal oxidation of all exposed silicon resulting in the formation of oxide layer
42
. Because of a relative increase in oxidation rate at sharp corners
15
, at the conclusion of oxidation these corners will have been rounded to become smooth corners
45
as illustrated in FIG.
4
.
Although effective to some extent, the above-described smoothing process of the prior art often fails because of the formation of crystal facets and overhangs at the corners instead of the idealized smoothly curved edges shown in FIG.
4
.
Thus there remains a need for a fully effective process for rounding the edges at the rim of trenches in silicon. Some of these solutions that have been proposed were found during a routine search of the prior art. For example, in U.S. Pat. No. 5,843,846, Nguyen et al. show a process to round the trench top corners using a sputtering process. A key feature of their process is very careful choice of etch chemistry since it is a requirement that not only the substrate but also the hard mask and photoresist layers get consumed during trench formation. The result is a process in which the dimensions of the trench continue to increase as edge rounding progresses.
In U.S. Pat. No. 5,837,615, Rostoker discloses a process for forming high aspect ratio trenches using sputtering. The slope of the trench's side walls is determined by the slope of the mask's sidewalls so top edge rounding is achieved by first rounding the oxide over the substrate rather than the trench sidewall. In U.S. Pat. No. 5,915,195, Fulford Jr. et al. describe an ion implantation process to improve gate oxide quality at the edge of a shallow trench. Meng et al. in U.S. Pat. No. 5,453,403 teach that sputtering in argon smooths out sharp edges, such edges being fully exposed during sputtering, while Stolmeijer (U.S. Pat. No. 5,874,317) shows a process to round trench corners and Moon et al. (U.S. Pat. No. 5,179,085) show a STI process.
SUMMARY OF THE INVENTION
It has been an object of the present invention to provide a process for rounding the edges at the rim of a trench formed within a silicon body.
Another object of the invention has been that the dimensions of the trench not be changed as a by-product of said process.
A further object has been that, after rounding, there be no facets or overhangs at said rim edges.
These objects have been achieved by first forming the trench using a silicon nitride hard mask having a layer of pad oxide between itself and the silicon surface. The silicon nitride is then briefly and selectively etched so that it pulls back from over the trench rim and exposes a small amount of the pad oxide. Rounding by means of sputtering is then effected with the pad oxide serving to protect the underlying silicon until just before rounding takes place. The result is smoothly rounded corners free of facets and overhangs.
REFERENCES:
patent: 5179085 (1993-01-01), Bigge et al.
patent: 5203957 (1993-04-01), Yoo et al.
patent: 5654232 (1997-08-01), Gardner
patent: 5837615 (1998-11-01), Rostoker
patent: 5874317 (1999-02-01), Stolmeijer
patent: 5915195 (1999-06-01), Fulford, Jr. et al.
patent: 6074954 (2000-06-01), Lill et al.
patent: 6143666 (2000-11-01), Lin et al.
Chen Fang-Cheng
Chiu Hsien-Kuang
Tao Hun-Jan
Ackerman Stephen B.
Lebentritt Michael
Saile George O.
Taiwan Semiconductor Manufacturing Company
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